1. Field of the Invention
The present invention relates to integrated circuit devices and methods of operating same and, more specifically, to memory devices and methods of operating memory devices.
2. Discussion of Related Art
Fully-buffered dual in-line memory modules (“FB-DIMM”) provide a high-bandwidth, high-capacity, and low-latency communication channel between a host processor or memory controller and a computer's memory subsystem. In contrast to conventional parallel stub bus memory subsystems, FB-DIMM memory subsystems utilize a serial channel. The serial channel contains multiple high speed differential point-to-point unidirectional links, segmented into northbound and southbound lanes.
The FB-DIMM uses an advance memory buffer (“AMB”) to manage communication across the serial channel. The AMB responds to channel commands directed to that particular AMB and forwards channel commands to other AMB devices on the channel. In operation, multiple serial data streams are carried on each bit lane and received by the AMB using a plurality of transceivers associated with each bit lane. The transceivers demultiplex each serial data stream, generating parallel frame data for use by the DRAMs located on the FB-DIMM module.
However, before channel and DRAM commands can be communicated to the AMB, the serial channel must be initialized. The AMB performs the serial channel initialization, which may include a serial channel training procedure to optimize data transport across all bit lanes. Conventional methodologies for serial channel initialization can be complicated and may in fact add latency to data transport across the serial channel.